Schematics » Historie » Version 1
Maximilian Seesslen, 08.10.2024 15:44
| 1 | 1 | Maximilian Seesslen | h1. Schematics |
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| 2 | |||
| 3 | h2. Debug-Input |
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| 4 | |||
| 5 | |1 | ->VDD 3V3 Target | Route | - | |
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| 6 | |2 | SWCLK | Route | switch | |
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| 7 | |3 | GND | - | p-switch | |
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| 8 | |4 | SWDIO | Route | switch | |
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| 9 | |5 | NRS | Route | switch | |
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| 10 | |6 | SWO (reserved) | Route | switch | |
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| 11 | |7 | Uart TX Target | Route | switch | |
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| 12 | |8 | Uart RX Target | Route | switch | |
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| 13 | |9 | VIN 5V | - | - | |
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| 14 | |10| (BOOT0) reserved | Route | switch | |
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| 15 | |||
| 16 | There are 2 PI5C3257QE for routing debug interface |
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| 17 | There are 2 PI5C3257QE for switching DUT debug interface off |